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ARM and Cortex RTOS Kernel

smxARM is the smx real-time multitasking RTOS kernel for ARM and Cortex processors. This datasheet only lists details for this architecture.
For full information see:

Processors Supported
  • ARM7, ARM9, ARM11, Cortex-R, Cortex-A
  • Cortex-M

See for Processors Supported chart.
See for free Evaluation Kits for common boards.

Development Tools Supported
  • IAR Embedded Workbench (EWARM)
  • Rowley CrossWorks
  • GNU C/C++

Development System Requirements

  • JTAG interface such as IAR I-jet, Segger J-Link/J-Trace, or Lauterbach TRACE32. Note that some boards have J-Link built-in.
  • ST-LINK, TI Stellaris, CMSIS DAP, or other on-board USB interface.

smxARM Development Kit Contents
  • Pre-built smxARM kernel library
  • Source code platform (Protosystem) for an easy start (configured for an eval board)
  • smxBSP for the selected processor
  • SMX Quick Start, SMX Target Guide, smx User's Guide, and smx Reference Manual
  • Site development license
  • Royalty-free license for one developed product

smxBSP and Startup Code

The smxARM development kit includes smxBSP, startup code, and drivers for on-chip peripherals, such as timers and UARTs. smxFS, smxNS, smxUSB, etc. have drivers to support on‑chip and external controllers. Also included is a project file for the EWARM or CrossWorks IDE to begin your application. If your processor is not in the list above, contact us. We are steadily supporting new ones. For a non-supported processor, you can start with the closest smxBSP and adapt it. See the smxBSP datasheet for more information. We recommend that you purchase the development board listed on our website for your processor. Use this to get a quick start, then modify smxBSP and the startup code for your custom board.

Easy Upgrade to/from Other Processors

smxARM shares the same code base with smxCF and smxPPC. Therefore it is easy to migrate between smxARM and other processor versions of smx. If you have experience with smx on one processor, then you are already well down the learning curve for a new project using a different processor.

Debugger Support

smxARM supports symbolic debugging for the IAR and CrossWorks debuggers. smxARM also supports Lauterbach TRACE32.

smxAware is a DLL that adds smx kernel-awareness to the debugger. IAR C-SPY is supported, but CrossWorks cannot be. With it, the debugger is aware of all tasks and smx objects running in the system, and you can:

  • Display information about kernel specific objects such as tasks, LSRs, semaphores, exchanges, messages, events, heaps, stacks etc. from an entry added to the main menu.
  • View errors, profiling, and other diagnostic information.
  • View a graphical window that shows event timelines, profiling, resource allocation, stack usage, and memory overview.
  • Display a trace log created by simple string markers output by the code.

Please refer to the smxAware datasheet for further information.


max interrupt latency:  78 clocks (== 0.4 microsec on 200 MHz ARM)
task switch time:  8.5 microsec (measured on 200 MHz ARM922T (NXP LH7A400))

Code Size
smx library (typical)
App core files + BSP + Base
C run-time library

  1. Sizes in KB.
  2. Typical size is the size of smx kernel functions needed by the Protosystem and several SMX products.
  3. The library can be configured smaller if error checks and other options are disabled. If memory is tight, please request an Evaluation Kit and measure sizes for your case.

Data Size

smx global variables:  600 bytes
stack space:  num stacks * stack size (typical stack size is 500 to 1000 bytes)
heap space:  space for control blocks + LSR queue + heap stacks + error buffer + event buffer + handle table

  1. Space for control blocks depends on the number of smx objects used. Control blocks range from 12 to 76 bytes.
  2. The LSR queue size is the number of LSRs that can be enqueued * 8 bytes per entry. Typically 20 to 100 elements.
  3. The error buffer is optional. Its size is the number of entries * 12 bytes per entry.
  4. The event buffer is optional. Its size is the number of entries * 24 bytes per entry.
  5. The handle table is optional. Its size is the number of entries * 8 bytes per entry. It is used only by smxAware.

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