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Kernel Products


smx® is an industrial-strength, hard real time multitasking kernel for embedded systems. It has been toughened by over 20 years of use in hundreds of embedded applications. smx supports the ARM, Cortex, ColdFire, PowerPC / Power Architecture, and other processor architectures, and can be used by itself or with other components of the SMX RTOS.

smx reduces development schedule and cost by offering proven code and pre-integration with popular processors and tools. The smxBSP package, which is included with smx, provides processor-specific support for smx and for the application software. smx is shipped with project files and documentation for specific tool suites. Clear manuals help users to understand how to use multitasking in their designs. The smx Protosystem allows a quick start, with good examples.

smx lowers product cost due to its high performance and small size. High performance allows using less expensive processors. In some cases, it allows using a single processor instead of a dual-processor. In many cases, smx fits into on-chip RAM and flash. This eliminates the need for external memory chips and may allow using processors without processor buses, which reduces pin count and thus cost, even further.

smx helps to improve reliability because it offers proven code, extensive built-in diagnostics, and powerful kernel-aware debugging using smxAware. The smxAware DLL works with several debuggers to provide kernel-aware debugging. It also offers Graphical Analysis Tools, which include, for example, timelines that show when each ISR, LSR, and task ran and what caused it to start and stop running. This kind of support permits delivering reliable embedded systems on tight schedules.

More easily maintained application code results from the better structure imposed by smx. Applications based upon smx are organized into tasks that behave predictably. This is more appropriate for modern embedded systems than is the customary super loop, which often results in spaghetti code. Embedded systems written with smx are easier to understand, debug, and maintain. The good task structure, provided by smx, helps when adding new product features to keep up with competition.

smx is affordable There are no royalties and the up-front cost is low. Full source code and 90 days support are included.


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Versions Offered

  • smxARM smx ARM kernel is targeted at all ARM7 and ARM9 processors.
  • smxCF smx ColdFire kernel supports all ColdFire processors.
  • smxPPC smx PowerPC kernel supports embedded PowerPC and Power Architecture processors.

Key Features

High performance is one of the key features of smx. A unique three-level control structure (ISR/LSR/Task) permits optimum control. ISRs respond to hardware interrupts and reenable them as quickly as possible. LSRs  perform deferred interrupt processing, with interrupts enabled. Less urgent processing is done by tasks. All smx calls operate with interrupts enabled. The smx scheduler disables interrupts only briefly. Because of this structure, smx interrupt latency is extremely low (comparable to that of the processor, itself). In addition, LSRs, which are invoked by smx timers as well as ISRs, provide much faster switching times than tasks because they do not save context and they do not switch stacks. Finally, the unique smx layered ready queue provides fast and deterministic task switching.

Small size is another key feature of smx. RAM usage has been optimized, as well as code size. By fitting into on-chip SRAM and flash, not only is the cost of external memory avoided, but also performance is greatly increased, thereby allowing a less expensive processor to be used. Support for one-shot tasks that can share stacks, minimizes stack RAM. Control blocks are small to also save RAM. smx code is efficiently written to minimize code footprint.

Sophisticated smx messaging system is built upon sending messages to exchanges rather than to tasks. Thus, receiving tasks are anonymous (i.e. a sending task does not know what task will receive the message it is sending). By swaping receiving tasks, a system can easily be reconfigured to behave differently. Messages can also have priorities. This allows prioritizing workloads for server tasks. Message safety is enhanced by using message control blocks rather than passing naked message pointers, which can easily be corrupted.

smx, of course, also provides the customary task management, memory management, semaphores, mutexes, event management, I/O, timing, and miscellaneous functions. smx offers a good balance between simplicity and richness of features.


Numerous free Evaluation Kits are posted for download. These run on popular evaluation boards and prove how easy it is to get started with smx. Or try a free Learning Kit.


To learn more about the smx multitasking kernel see:

  1. smx Datasheet
  2. smx Special Features
  3. smx v4
  4. smx++ Datasheet
  5. Link Service Routines
  6. One-Shot Tasks
  7. Deferred Interrupt Processing


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Benefits

  • Reduces development schedule and cost
  • Lowers product cost
  • Improves reliability
  • More easily maintained application code
  • It is affordable

 
Brief History of smx

The smx multitasking kernel was first shipped in Jan 1989, for use on x86 real-mode processors. At that time, memory and processors were at least two orders of magnitude smaller and slower than they are today. Consequently, smx was designed to be very simple and to offer high performance with a small memory footprint. In 1996, the smx scheduler was rewritten in C, and smx was ported to the PowerPC. In 1999, smx was ported to ColdFire, and in 2002 to ARM. In 2003, smxBSP was introduced to make supporting new processors easier. In Oct 2010, v4.0 was released, which renamed the API, reimplemented the scheduler, and cleaned up the code (removing x86 segmentation), and made a few improvements. In Nov 2012, v4.1 was released, which made significant improvements such as adding a system stack, precise timeouts, precise profiling and time measurement, and further improvements to the scheduler and porting layer. In Jan 2014, v4.2 was released which redesigned event groups, semaphores, exchanges, and blocks and made many other significant changes. (See About v4 page for more.) Today, the services provided by smx have more than doubled; yet it is still small and fast compared to other solutions. smx has gone from simple to superior.
 

Achieving Low Interrupt Latency

Link Service Routines (LSRs) are so named because they link foreground ISRs with background tasks. LSRs perform deferred interrupt processing. The goal is for each ISR to do the minimum work necessary to get or put a datum, reset the peripheral, and reenable the interrupt. ISRs invoke LSRs to do deferred interrupt processing and to perform smx calls that cause tasks to run.

Most engineers do not want the kernel or RTOS to delay their interrupt processing code. smx was designed with this objective in mind. Because smx calls can be made only from LSRs, there are no critical sections to protect in them nor in 98% of the scheduler (i.e. almost all of smx!). All of this code runs with interrupts fully enabled. Only a few small sections of the smx scheduler disable interrupts (e.g. 58 clocks for smxCF). As an added bonus, LSRs permit dealing with peak interrupt loading in a smooth manner. For more information, see: Link Service Routines.
 

 
Saving SRAM
with One-Shot Tasks


On-chip SRAM is much faster than external SDRAM. However, it is 8 times as expensive as NOR flash, per bit. Hence, optimizing on-chip SRAM usage is very important for both cost and performance. In multitasking systems, a major usage of RAM is for task stacks. To mitigate this problem, smx supports what are known as one-shot tasks. One-shot tasks are so named because they run once from start to finish. When done, no information is carried over to the next run. Hence, a one-shot task does not need a stack when it stops. smx allows the stack to be released back to a stack pool, for use by another task. Under smx, stopped tasks can wait at semaphores, mutexes, exchanges, etc just like normal suspended tasks. When a one shot task is dispatched, the smx scheduler gives it a new stack from the stack pool. Hence, a system with 10 tasks could operate with only 2 stacks as long as only 2 tasks need to run simultaneously. If no stack is available, the task waits. smx permits any mix of one-shot tasks and normal tasks. For more information, see One-Shot Tasks.
 
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